The semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area. As the demand for even smaller electronic devices has grown recently, there has grown a need for improving power integrity of integrated circuits.
As semiconductor technologies evolve, the speed of integrated circuits has increased exponentially as semiconductor process nodes shrink to a few nanometers. Such increased operating speed demands a stable power bus so that logic circuits coupled to the power bus can operate reliably. However, as the scale of the integrated circuit shrinks to a lower level, the resistance of the power distribution network of an integrated circuit may increase as a result. Such increased distribution network resistance prevents the power bus from rapidly adapting to load variations of the integrated circuit. As a result, the voltage of the power bus may deviate from the specified range of the integrated circuit. The voltage deviation on the power bus may cause a variety of reliability issues such as reducing noise margins, increasing signal delays and/or the like.
Inserting decoupling capacitors next to local power buses of an integrated circuit is an effective method to maintain the voltages of local power buses within the specified range of the integrated circuit. During a logic transition, the load of the integrated circuit may change rapidly. The decoupling capacitors placed locally may function as a local power source like a reservoir of current, which is instantaneously available for the adjacent switching load. As a result, the glitches of the voltage of the local power bus can be prevented through a discharge of the energy stored in the decoupling capacitors.
Ideally, a plurality of decoupling capacitors may be placed next to each power bus of an integrated circuit. However, the placement locations of decoupling capacitors are limited by the space available for inserting decoupling capacitors. In addition, decoupling capacitors are commonly formed by CMOS transistors, which may cause unnecessary power leakage if redundant decoupling capacitors are employed.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.